Glossary:PLL: Difference between revisions
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A phase locked loop or PLL is a circuit in which the [[Glossary:Frequency|frequency]] of a variable frequency [[Glossary:Oscillator|oscillator]] is locked to a reference frequency or to a frequency with a simple numerical relationship to it. The many applications include digital tuning in a radio. | A phase locked loop or PLL is a circuit in which both the [[Glossary:Frequency|frequency]] and [[Glossary:Phase|phase]] of a variable frequency [[Glossary:Oscillator|oscillator]] is locked to a reference frequency or to a frequency with a simple numerical relationship to it. The many applications include digital tuning in a radio and the generation of the different clock frequencies for the [[Glossary:CPU|processor]] and [[Glossary:RAM|RAM]] in a computer. | ||
Latest revision as of 16:38, 10 February 2024
A phase locked loop or PLL is a circuit in which both the frequency and phase of a variable frequency oscillator is locked to a reference frequency or to a frequency with a simple numerical relationship to it. The many applications include digital tuning in a radio and the generation of the different clock frequencies for the processor and RAM in a computer.