Glossary:PLL: Difference between revisions
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Revision as of 22:25, 30 March 2019
A phase locked loop or PLL is a circuit containing a variable frequency oscillator which, by means of a feedback loop, is kept locked in phase with an input signal. The oscillator output may be fed into a frequency divider before being compared with the input signal, so locking the oscillator to a numerical multiple of the input frequency.